:- Instrcution Set -:

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Load/Store Instructions
See Load Instructions Notes for more informations.

 Instruction 
 Description
lb rd,offset(base) Load Byte.
Loads the 8bit addressed by offset+base into
the low order 8bit of rd. The byte is sign-extended in rd.
Example 1:
byte=0x0 .... 0x7f (dec: 0...127) is loaded into t5.
before: t5=undefined.
load: lb t5,10(t0) / let the byte be 0x2F
after: t5=0x0000002F.
Example 2:
byte=0x80 .... 0xff (dec: 0...-128) is loaded into t5.
before: t5=undefined.
load: lb t5,10(t0) / let the byte be 0xEA
after: t5=0xFFFFFFEA
lbu rd,offset(base) Load Byte Unsigned.
Loads the 8bit addressed by offset+base into
the low order 8bit of rd. The leading 24 bit are cleared.
lh rd,offset(base) Load Halfword.
Loads the 16bit addressed by offset+base into
the low order 16bit of rd. The halfword is placed as
sign-extended word in rd.
Example 1:
halfword=0x0...0x7fff (dec 0...32737) is loaded into t4.
before: t4=undefined
load: lh t4,16(t0) / let the halfword be 0x0815
after: t4=0x00000815
Example 2:
halfword=0x8000...0xffff(dec 0...-32738) is loaded into t6.
before:t6=undefined
load: lh t6,1024(t0) /let the halfword be 0xFACE
after: t6=0xFFFFFACE
lhu rd,offset(base) Load Halfword Unsigned.
Load the 16bit addressed by offset+base into the low
order 16bit of rd. The high order 16bit are cleared.
lw rd,offset(base) Load Word.
The word addressed by offset+base is placed into rd.
lwl rd,offset(base) Load Word Left.
lwr rd,offset(base) Load Word Right.
sb rd,offset(base) Store Byte.
The lowest 8bit of rd are stored in memory
addressed by offset+base.
sh rd,offset(base) Store Halfword. 
The lower 16bit of rd are stored in
memory addressed by offset+base.
sw rd,offset(base) Store Word.
The contents of rd is stored in memory addressed by offset+base.
swl rd,offset(base) Store Word Left.
swr rd,offset(base) Store Word Right.

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Arithmetic Instructions (Immediate-Type)

 Instruction 
 Description 
addi rd,rs,immediate Add Immediate.
Adds the contents of rs with signed immedate value and
stores the result in rd.
addiu rd,rs,immediate Add Immediate Unsigned.
Adds the contents of rs with unsigned immedate value and stores
the result in rd.
andi rd,rs,immediate AND Immediate.
ANDs bitwise the contents of rs with immediate value. The result
is placed in rd.
ori rd,rs,immediate OR Immediate.
ORs bitwise the contents of rs with immediate value. The result
is placed in rd.
xori rd,rs,immediate XOR Immediate.
XORs bitwise the contents of rs with immedate value. The result
is placed in rd.
slti rd,rs,immediate Set on Less Than Immediate.
Sets rd=1 if rs<immediate, else rd=0. The values are seen as
signed integers.
sltiu rd,rs,immediate Set on Less Than Immediate Unsigned.
Sets rd=1 if rs<immedate, else rd=0. The values are seen as
unsigned integers.
lui rd,immediate Load Upper Immediate.
Loads the immediate value into the high order 16 bit of rd.

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Arithmetic Instructions (Register Type)

 Instruction 
 Description 
add rd,rs,rt Add.
Adds the contents of rs and rt and stores the result in rd.
addu rd,rs,rt Add Unsigned.
Adds the contents of rs(unsigned) and rt(unsigned) and stores the
result in rd.
sub rd,rs,rt Subtrsct.
Subtrscts the contents of rt from rs and stores the
result inrd.
subu rd,rs,rt Subtrsct Unsigned.
Subtrscts the contents of rt(unsigned) from rs(unsigned) and stores
the result in rd.
and rd,rs,rt AND.
ANDs bitwise the contents of rs and rt. The result is placed in rd.
or rd,rs,rt OR.
ORs bitwise the contents of rs and rt. The result is placed in rd.
xor rd,rs,rt XOR.
XORs bitwise the contents of rs and rt. The result is placed in rd.
nor rd,rs,rt NOR.
NOTs bitwise the contents of rs and rt. The result is placed in rd.
slt rd,rs,rt Set on Less Than.
Sets rd=1 if rs<rt, else rd=0. The values are seen as signed
integers. (example: 0x00008000<0x00007FFF)
sltu rd,rs,rt Set on Less Than Unsigned.
Sets rd=1 if rs<rt, else rd=0. The values are seen as unsigned
integers. (example: 0x00008000>0x00007FFF)

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Shift Instructions

 Instruction 
 Description 
sll rd,rs,shamt Shift Left Logical.
The contents of rs is shifted left by the amount of bits specified by shamt
and the result is placed in rd. shamt is 5 bit wide, so 1 up to 32 bit shift can 
be performed.
srl rd,rs,shamt Shift Right Logical.
The contents of rs is shifted right by the amount of bits specified by shamt
and the result is placed in rd.
sra rd,rs,shamt Shift Right Arithmetic.
The contents of rs is shifted right by the amount of bits specified by shamt
and the result is placed in rd. The sign bit is beeing kept.
Example:
before: t7=0x80000000
shift: srs t7,t7,1
after: t7=0xC0000000
sllv rd,rs,rt Shift Left Logical Variable.
The contents of rs is shifted left by the amount of bits specified in rt and
the result is palced in rd.
srlv rd,rs,rt Shift Right Logical Variable.
The contents of rs is shifted right by the amount of bits specified in rt and
the result is placed in rd.
srav rd,rs,rt Shift Right Arithmetic Variable.
The contents of rs is shifted right by the amount of bits specified in rt and
the result is placed in rd. The sign bit is beeing kept.

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Multiply/Divide Intructions
See Multiply/Divide Notes for more informations.

 Instruction 
 Description 
mult rd,rs Multiply.
Multiplies the contents of rd by rs and stores the 64bit value
in hi/lo.
multu rd,rs Multiply Unsigned.
Multiplies the unsgined contents of rd by the unsigned
contents of rs and stores the 64bit result in hi/lo.
div rd,rs Divide.
Divides the contents of rd by rs and stores the 32bit quotient in
lo and the 32bit remainder in hi.
divu rd,rs Divide Unsigned.
Divides the unsigned contes of rd by the unsigned contents of rs
and stores the 32bit quotient in lo and the 32bit remainder in hi.
mfhi rd Move from HI.
Stores the contents of hi in rd.
mflo rd Move from LO.
Stores the contents of lo in rd.
mthi rd Move to HI.
Moves the contents of rd in hi.
mtlo rd Move to LO.
Moves the contents of rd in lo.

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Jump/Branch Instructions
See Jump/Branch Notes for more informations.

 Instruction 
 Description 
j target Jump.
Uncoditional jump to target.The target address is calculated (pc+4)+target.
target is seen as 26bit signed integer. In assembly we will use labels.
jal target Jump And Link.
Unconditional jump to target. The address pc+8 is stored in rs register
($31/R_RA).
jr rd Jump Register.
The contents of rd is loaded in pc.
jalr rd Jump And Link Register.
The address pc+8 is stored in rs register ($31/R_RA).  The contents of rd is
loaded in pc.
beq rd,rs,offset Branch if Equal.
Branch to offset if rd==rs. offset specifies a relative value
where to continue program if condition is true. (label)
bne rd,rs,offset Branch on Not Equal.
Branch to offset if rd!=rs. (see beq)
blez rd,offset Branch on Lower than or Equal Zero.
Branch to offset  if rd<=0. (see beq)
bgtz rd,offset Branch on Greater Than Zero.
Branch to offset if rd>0. (see beq)
bltz rd,offset Branch if Lower Than Zero.
Branch to offset if rd<0.(see beq)
bgez rd,offset Branch if Greater than or Equal Zero.
Branch to offset if rd>=0. (see beq)
bltzal rd,offset Branch if Lower Than Zero And Link.
If rd<0 then store the pc+8 in ra (R_RA/$31) and branch to offset.
(see beq)
bgezal rd,offset Branch if Greater than or Equal Zero And Link.
If rd>=0 then store the pc+8 in ra (R_RA/$31) and branch to offset.
(see beq)

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Special Instructions
(not used in example functions)

 Instruction 
 Description 
syscall System Call.
Initialize System-Call. 
break Breakpoint.
Executes the Exception Handler.

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System Control Coprocessor Instructions
(not used in example functions)

 Instruction 
 Description 
mfc0 rs,RD Move from Sytem Control Coprocessor.
Moves the contents from the system control register RD
in the general register rs.
mtc0 rs,RS Move to System Control Coprocessor.
Moves the contents from the general register rs in the
system control register RD.
rfe Restore From Exception.
tlbr Read Indexed TLB Entry.
tlbwi Write Indexed TLB Entry.
tlbwr Write Random TLB Entry.
tlbp Probe TLB for matching Entry.

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Coprocessor Instructions
(not used in example functions) >

 Instruction 
 Description 
lwcz Load Word from Coprocessor.
swcz Store Word to Coprocessor.
mtcz Move to Coprocessor.
mfcz Move from Coprocessor.
ctcz Move Control To Coprocessor.
cfcz Move Control From Coprocessor.
copz Coprocessor Operantion.
bczt Branch on Coprocessor z True.
bczf Branch on Coprocessor z False.



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